Two of the problems hindering the further shrinkage of metal-oxide-semiconductor (MOS) devices are decreased breakdown voltage and increased junction capacitance. In particular, shallow (&lt;0.25 micron), low-resistivity P-type source/drain regions in N-type wells are subject to low junction breakdown voltage and high junction capacitance. These effects are particularly troublesome in the manufacture of high-density memories in which some devices may experience relatively high (.about.20V) voltages across the drain junction and in which junction capacitance is a major contributor to total bit-line capacitance.
A major focus of attention in the search for solutions to these problems is the use of "graded" source/drain regions. Such junctions are characterized by less abrupt changes in the doping profile across the junction and may be achieved with a large number of processes. In general, a graded junction has a higher breakdown voltage and a lower junction capacitance than a similar non-graded junction.
U.S. Pat. No. 4,298,401, issued Nov. 3, 1981 to Nuez et al., discloses a method of manufacturing a resistor in a semiconductor substrate using a double-implant process. The junction formed by the disclosed process is graded and exhibits a high breakdown voltage. The process involves a first implant of boron at a relatively low energy and a relatively high dose which determines the resistivity of the resistor and a second implant (the grading implant) of boron at a relatively high energy and a relatively low dose which determines the breakdown characteristics of the junction. These implants are followed by an anneal step to redistribute the dopant and to heal implant damage.
The Nuez et al. patent states that the disclosed process is suitable for forming graded source/drain junctions in the manufacture of active devices such as MOS transistors. However, the disclosed process has a number of drawbacks when so applied. For instance, Nuez et al. disclose no means of separately controlling the lateral and vertical grading of the junction. This control may be critical in small-geometry devices in which source/drain encroachment under the gate oxide must be carefully controlled. In addition, the relatively high energy of both the primary and grading implant steps disclosed by Nuez et al. are inappropriate for forming shallow source/drain junctions.